Wednesday, 1 May 2024
CAN Bus Guide

CAN Bus Guide – Error Flag

A Comprehensible Guide to Controller Area Network (CAN Bus) by Wilfried Voss
Click on image for Table of Content

A node, that detects an error, will send an error frame, starting with the error flag. This occurs immediately with the next bit interval, unless the detected error is a CRC error.

Error Frame 1
Picture 4.7.1.1: Basic Error Frame Architecture

In case of a CRC error the sending of the error flag will be delayed by two bit times in order not to conflict with the Acknowledge function (see picture 4.7.1.2).

CRC and ACK Field
Picture 4.7.1.2: CRC and Acknowledgement Field

As mentioned in the previous chapter, the actual error flag, as it occurs on the bus, may be constructed by a superposition of several error frames.

Error Frame 2
Picture 4.7.1.3: “Realistic” Error Frame

To elaborate a bit more about this effect, the following are some possible error detecting and reporting scenarios:

  • Example: Transmitting Error

Picture 4.7.1.4 demonstrates the scenario of a local transmitting error. The transmitting node in a CAN network detects, for instance, a data bit error (see also Chapter 8.1 – Error Detection) and immediately, with the beginning of the next bit interval, starts the transmission of the error frame, starting with the error flag.

Example - Global Bit Error -1
Picture 4.7.1.4: Example 1 – Super Positioning of Error Frames

Each transmitting node in a CAN network compares its output signal with the actual bus level at the end of each bit cycle (Bit Monitoring). An error will be reported, should the comparison show different levels (see also Chapter 8.1 – Error Detection).

Picture 4.7.1.4 also demonstrates how a receiving node (actually each other node in the network) reacts to a Bit Stuffing Error, i.e. the sequence of more than 5 consecutive bits of the same level.

As a result of the bit stuffing violation the receiving node(s) will post an error frame as well. The super positioning of both error flags reflects to the bus as shown in the picture. In this example the error flag has a length of 12 bits; the total error frame length is 20 bits.

Following the Error Delimiter (8 bits) and the Interframe Space (3 bits) output by the other node(s) in the network, the transmitting node will engage into another bus arbitration cycle.

The question, however, is, how does the node know when to output the new Start of Frame signal? After all, it had sent out the 6 bit long error flag and, after another 11 bits (error delimiter and Interframe space), the node might consider the bus idle and start the new arbitration right then. This would, of course, cause a confusion on the CAN bus.

The answer to this question lies in the initial posting of the Error Delimiter as explained in Chapter 4.7.2 – Error Delimiter.

The next error detecting and reporting example describes a receiving error scenario:

  • Example: Receiving Error

A message transmitting node monitors the bus and expects a dominant level during the ACK slot. This will be the case when either one of the other CAN nodes outputs a dominant level.

CRC Acknowledgement 1
Picture 4.7.1.5: Acknowledgement Function

In this sample scenario, one of the receiving nodes in the network detects a check sum (CRC Sequence) error (see also Chapter 8.1 – Error Detection) and immediately, with the beginning of the next bit interval, starts the transmission of the error frame, starting with the error flag (see picture 4.7.1.6).

In case of a CRC error the sending of the error flag will be delayed by two bit times in order not to conflict with the Acknowledge function (See picture 4.7.1.2).

Example - Global Bit Error - 3
Picture 4.7.1.6: Example 2 – Super Positioning of Error Frames

Picture 4.7.1.6 demonstrates the output levels of a transmitting and a receiving node, which in turn detects the CRC error, and the actual bus level.

The transmitting node, after sending the CRC sequence plus the recessive CRC Delimiter, will switch into listening (receiving) mode and wait for one bit time to monitor the response from other nodes in the network. In this example a receiving node determined a CRC error during the CRC Delimiter and reports the error by posting a recessive level during the Acknowledgement Slot. The posting of the recessive level may not have any effect on the bus level in case other nodes in the network do not detect a CRC error. In this case the bus level will remain dominant.

The CAN standard takes into consideration that a defective node may detect errors while the other nodes in the network do not see a problem. In order to prevent a defective node from continuously reporting errors and therefore blocking the entire CAN bus, the CAN standard defines two different error reporting rights, error-active and error-passive (see also Chapter 8 – Error Detection and Fault Confinement).

The error-reporting node will delay the posting of an error frame for two bit times, i.e. the Acknowledgement slot and the ACK Delimiter, in order not to conflict with the Acknowledge function. The error frame will be sent to the bus right after the completion of the ACK Delimiter.

At the same time, i.e. right after the completed ACK Delimiter, the transmitting node will detect a bit error, because it was attempting to send the first of 7 recessive bits of the End of Frame field.

Each transmitting node in a CAN network compares its output signal with the actual bus level at the end of each bit cycle (Bit Monitoring). An error will be reported, should the comparison show different levels (see also Chapter 8.1 – Error Detection).

The transmitting node in turn will post its own error frame. As shown in picture 4.7.1.6 the resulting error flag length on the bus will be 7 bit times.

Both examples, transmitting and receiving error, describe scenarios of overlapping error flags posted by different nodes in the network. The CAN standard considers the monitoring and timing of error frames to determine which node(s) reported the error first. In addition the determination of local and global errors allows the detection of single defective nodes (see Chapter 8 – Error Detection and Fault Confinement).